🐦 推特Marvell TechnologyV1 · 实盘不做把握 5/10
北京时间·🕒 发布 05-29 00:01:30时区推断·⟳ 抓取 06-12 03:09:07回填·⚡ 决策 06-16 22:38:22·133.2 天前
Marvell与立讯精密在OFC 2026展示224G长距离SerDes铜连接技术
📄 原文Marvell Technology↗ 原文
Copper continues to deliver in dense AI computing environments, and a recent demonstration at OFC 2026 shows how far th…
不做 MRVL.US
常规展会技术PR，224G SerDes属行业已知迭代路线，无超预期订单或业绩催化，大盘股缺乏弹性，无明显edge。
不做 002475.SZ
作为合作方被点名，但单一展会技术展示对立讯精密这类大盘股基本面及短期情绪影响有限，缺乏爆发弹性。
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原文全文
展开原文 · 837 字
Copper continues to deliver in dense AI computing environments, and a recent demonstration at OFC 2026 shows how far the technology has advanced.
Marvell and Luxshare-Tech demonstrated 224G long-range SerDes driving signals across a 2.5-meter CPC-backplane-CPC channel, achieving lane bit error rates of 1e-11 at 4 picojoules per bit. Up to 512 lanes of the technology could be integrated into a 102.4T switch.
SerDes is the foundational building block of high-speed networking, with direct impact on power consumption, latency, bandwidth and total cost of ownership. Lowering power by a single picojoule per bit on a 200G/lane device can reduce system power consumption by up to 100 watts.
Senior Staff Engineer Aatreya Chakravarti details the demonstration and the broader role SerDes plays in scaling AI data center infrastructure:
Marvell and Luxshare-Tech demonstrated 224G long-range SerDes driving signals across a 2.5-meter CPC-backplane-CPC channel, achieving lane bit error rates of 1e-11 at 4 picojoules per bit. Up to 512 lanes of the technology could be integrated into a 102.4T switch.
SerDes is the foundational building block of high-speed networking, with direct impact on power consumption, latency, bandwidth and total cost of ownership. Lowering power by a single picojoule per bit on a 200G/lane device can reduce system power consumption by up to 100 watts.
Senior Staff Engineer Aatreya Chakravarti details the demonstration and the broader role SerDes plays in scaling AI data center infrastructure:
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