TSMC据称HBM先进封装短期继续采用微凸点并要求供应商开发5μm级材料方案

TSMC to Stick With Microbumps Over Hybrid Bonding for HBM Packaging for Now, Tasks Suppliers With 5μm Development

Taiwan’s TSMC is expected to continue using conventional microbump technology, rather than hybrid bonding, for advanced packaging that connects high-bandwidth memory (HBM) with AI accelerators for the time being. Given the development cycle for related materials, finer-pitch microbumps are expected to remain in use through the later stages of HBM4 and into the early phase of HBM5.

According to materials industry sources on September 2, TSMC has asked its materials and equipment partners to develop bonding and underfill solutions for approximately 5-micrometer (μm)-class bumps. In other words, TSMC wants the microbumps currently used in advanced packaging to become even shorter and finer. Korean and Japanese suppliers have begun development, with mass production of 5μm-class bumps estimated to begin in the second half of 2028.

Currently, bump heights are approximately 15–25μm for third-generation extended HBM, or HBM3E, while HBM4 is approaching roughly 10μm. Japanese materials suppliers have previously said they have difficulty guaranteeing quality below 15μm. A 5μm bump would therefore fall well below the current qualification threshold.

The reason for making the bumps shorter and finer is the height limit of the HBM cube and the need for higher interconnect density. Under JEDEC specifications, the maximum HBM stack height is 775μm. The number of I/O connections continues to increase, but the overall stack must remain within this height limit.

In TSMC’s advanced CoWoS packaging, the GPU and the HBM stack—already assembled by the memory supplier—are mounted onto a silicon interposer using microbumps. The stacking of 16 DRAM dies itself is performed within the HBM package by companies such as SK hynix and Samsung Electronics, rather than by TSMC. However, as the number of interconnects on the accelerator side increases, the microbumps used to mount the devices in CoWoS also need to become shorter and more densely packed.

First- and second-generation HBM used relatively large solder bumps. As the number of stacked dies and I/O connections increased, microbumps became the mainstream approach around the HBM3 generation. SK hynix has used its MR-MUF process, in which liquid underfill is applied after mass reflow, while Samsung Electronics has used TC-NCF, which places a film-type underfill between the dies before thermocompression bonding.

Hybrid bonding has been discussed as the next step. By eliminating bumps and directly bonding copper pads, the interconnect can be made thinner and significantly denser. TSMC already uses this technology, under the SoIC platform, for stacking logic chips. However, HBM is still attached to the interposer using microbumps. The industry has been reluctant to abandon a process that is already proven in terms of yield, inspection, and high-volume manufacturing.

At the 5μm scale, manufacturers must simultaneously solve issues involving void-free underfill, residual flux, and bonding alignment. Given the level of difficulty, TSMC appears to have distributed different development tasks across its materials and equipment partners.

The direction within the HBM stack itself is similar. At Hot Chips 2026 last month, SK hynix indicated a roadmap under which it would continue using microbump-based MR-MUF through HBM4 and HBM4E, rather than adopting hybrid bonding. Direct bonding was positioned as a technology for HBM5 and for stacks exceeding 20 dies. Industry observers believe JEDEC’s decision to raise the maximum HBM stack height from 720μm to 775μm has provided additional headroom to extend the use of microbumps.

A materials industry source said, “TSMC’s request to develop finer microbumps can be interpreted as a signal that, for this generation, it intends to use lower-profile microbumps rather than move to direct bonding.”

The source added, “Microbumps below 15μm have already been developed, but guaranteeing their quality remains difficult. The key challenge is not so much the bump itself, but developing an underfill solution that can reliably support and qualify it.”