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北京时间·🕒 发布 22:03:02时区推断·⟳ 抓取 22:03:11·⚡ 决策 09-04 22:04:30 +1m19s·52.8 天前
SemiAnalysis 分析 Intel Diamond Rapids 放弃 EMIB 封装改用 UCIe-S 基板实现 UMA 架构
这是 SemiAnalysis 对 Intel 2027 年 Diamond Rapids CPU 封装架构选择的技术分析推文，不是新公告、订单、业绩或监管事件。设计决策本身可能数月前已确定，推文只是解释性分析。无可量化的近期财务影响，无可识别的方向性催化，不构成事件驱动交易机会。
📄 原文SemiAnalysis@SemiAnalysis_↗ 原文
Why did Intel abandon EMIB for their 2027 Diamond Rapids CPU? Uniform Memory Access. All CPU cores in each CBB can acce…
不做 Intel（INTC.US）
SemiAnalysis 技术解读推文，非官方新催化；涉及 2027 年产品架构选择，距量产超一年，无近期财务增量可量化，不构成事件驱动交易机会
展开详情(成交明细 / 研究档案 / 原文全文 / 决策记录链)
研究档案
结论摘要
SemiAnalysis 发推解释 Intel Diamond Rapids（2027）为何放弃 EMIB 改用 UCIe-S 基板实现 UMA，并对比 AMD Venice NUMA。这是行业分析师对已知设计选择的技术解读，非 Intel 官方新披露，距量产超一年，无近期收入/利润增量可量化，无明确方向性催化，不构成可交易事件。
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{"result": "search_processed_events:agent query=`intel abandon emib 2027 cpu | intel diamond rapids emib packaging | intel ucie-s substrate uniform memory access`；结构化索引覆盖完整 72 小时；旧记录兼容扫描近 72.0/72 小时、7302 条本臂决策(完整)，返回 0 条候选。未命中只表示这些 agent query 表达式没有召回候选，不能据此证明消息首发或不是重复；按当前事件继续正常研判。"}
原文全文
展开原文 · 642 字
Why did Intel abandon EMIB for their 2027 Diamond Rapids CPU?
Uniform Memory Access. All CPU cores in each CBB can access all 16 memory channels with a single hop. UCIe-S through the substrate was required to route signals underneath the near-IMH to the far-IMH with about 30mm of reach to achieve this.
In contrast AMD's Venice is a NUMA design. Half the memory channels are on a remote-IOD that require an extra hop for the cores in the CCD to access vs memory channels in the local-IOD.
As a bonus, Intel also saves on packaging cost without having to use EMIB, freeing up advanced packaging capacity for their external foundry customers
Uniform Memory Access. All CPU cores in each CBB can access all 16 memory channels with a single hop. UCIe-S through the substrate was required to route signals underneath the near-IMH to the far-IMH with about 30mm of reach to achieve this.
In contrast AMD's Venice is a NUMA design. Half the memory channels are on a remote-IOD that require an extra hop for the cores in the CCD to access vs memory channels in the local-IOD.
As a bonus, Intel also saves on packaging cost without having to use EMIB, freeing up advanced packaging capacity for their external foundry customers
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