The Information称台积电正与景硕开发EMIB-like先进封装载板技术以应对英特尔竞争

Intel has developed a packaging technique known as Embedded Multi-die Interconnect Bridge, or EMIB, which uses small pieces of silicon to create high-speed links between processors and memory. The process has drawn interest from potential customers such as Nvidia, because it can support larger multidie designs—allowing the creation of more powerful AI chips—and help chip designers diversify their suppliers. Nvidia is evaluating EMIB for a future processor combining four graphics chips in a single package, [The Information has reported](https://www.theinformation.com/articles/google-nvidia-consider-intel-backup-chip-manufacturer).

Meanwhile, TSMC engineers refer internally to the company’s advanced packaging project as “EMIB-like,” the people said, and have discussed the approach with some customers. TSMC is developing the technology with Kinsus Interconnect Technology Corp., a Taiwanese company that makes the substrates forming the base of a chip package and carrying signals between the chips and the rest of a server, the people said.

TSMC declined to comment. Kinsus didn’t respond to a request for comment.

TSMC’s existing advanced-packaging capacity has become so tight that it is limiting customers’ growth, CEO C.C. Wei said on an earnings call this month. Those capacity constraints have offered Intel a rare opportunity to court customers that have relied heavily on TSMC.

Even if those customers initially turn to Intel only for packaging, that work could help the U.S. company demonstrate its technology, deepen customer relationships and eventually compete for more chip-manufacturing orders.

Such interest has been a striking turn for Intel, which has spent years trying to win back the industry’s most demanding customers. The U.S. chipmaker once led the race to manufacture the world’s most advanced semiconductors, but repeated production delays allowed TSMC to pull ahead, prompting many of the industry’s leading designers to shift more of their most sophisticated products to the Taiwanese company.

TSMC now makes the most advanced chips for companies including Nvidia. Intel, meanwhile, is trying to build a contract-manufacturing business capable of competing with TSMC. Advanced packaging gives Intel another route to recruit potential customers as it works to restore its manufacturing credibility. Google, for instance, has placed an order for Intel to package more than 3 million of its custom AI processors in 2028 after months of testing the chipmaker’s EMIB technology, The Information reported.

For TSMC, the EMIB-like project is a way to keep Intel’s edge from taking hold. The effort remains at an early stage, and it’s unclear when it will reach commercial production, the people said. But it shows how the AI boom is pushing the world’s dominant chipmaker to broaden its packaging lineup as customers seek more capacity and alternative ways to assemble next-generation processors.

TSMC’s Chip-on-Wafer-on-Substrate is the go-to technology for packaging AI chips from companies including Nvidia and Google. AI processors must constantly draw vast amounts of data from memory, requiring placement of the two components close together with high-speed connections.

TSMC’s CoWoS provides those connections through an intermediate layer beneath the processors and memory. Intel’s EMIB instead embeds small strips of silicon in the package substrate only where the fastest connections are needed, rather than placing all the components on one layer, an approach that can make it easier to assemble increasingly large and complicated designs.

That makes the substrate a critical part of the EMIB-like packaging technology development. Kinsus could help TSMC design and manufacture the substrate that holds the silicon bridges and connects the components above them.