三星重组半导体研究院并设立 Core Team、统一 DRAM/NAND 研发人员奖金标准，加速下一代存储研发量产衔接

Samsung Electronics is reportedly restructuring its semiconductor research operations and performance-based compensation system to accelerate next-generation DRAM and NAND flash development, bringing researchers and production teams closer together while addressing concerns over incentives and talent retention.

The South Korean chipmaker has formalised a cross-functional Core Team within its Semiconductor Research Institute, integrating process technology and design specialists working on new memory products. Researchers who meet predetermined development targets are also expected to qualify for bonuses under the more favourable standards applied to Samsung's Memory Business Division.
According to South Korea's Maeil Business Newspaper , Financial News and Yonhap News Agency , the changes build on existing collaboration between research and business units, with greater emphasis on development speed, product readiness and rewards tied to individual contributions.
Core Team bridges research and mass production
Samsung's Semiconductor Research Institute, led by Device Solutions (DS) division CTO Song Jae-hyuk, employs approximately 2,000 people and focuses on advanced device architectures and manufacturing processes. The Memory Business Division subsequently applies these technologies to commercial products, a process that includes prototype validation and mass-production process development.
As semiconductor scaling becomes increasingly complex, process design and individual manufacturing steps require simultaneous optimisation. Research institute personnel and Memory Business Division engineers have therefore long collaborated on major product programmes, with some researchers transferring temporarily to business units during production development.
The Core Team formalises these arrangements for selected next-generation DRAM and NAND development projects, combining process technology and design expertise around shared objectives. The aim is to shorten the transition from early-stage research to product validation and volume manufacturing while improving coordination between teams.
Revised bonus rules target the R&D reward gap
Compensation is a central element of the restructuring. Under a May 2026 labour-management agreement, Samsung allocated 10.5% of the DS division's operating profit to a special performance bonus pool.
The original proposal classified Semiconductor Research Institute employees as part of a common organisation, making them eligible for bonuses worth approximately 70% of those paid to Memory Business Division staff. As a result, institute researchers and Memory Business Division staff working on the same development project could receive different rewards solely because of their organisational affiliation, prompting internal dissatisfaction.
Under the revised arrangement, researchers assigned to the Core Team would qualify for the Memory Business Division's bonus standards upon meeting predetermined development targets, even while remaining institute employees.
The change is intended to narrow compensation disparities, strengthen incentives for cross-functional collaboration and discourage departures among critical R&D personnel.
Actual bonus payout rates for each business unit are scheduled to be finalised in February 2027. Individual payments will depend on eligibility, performance targets and the final calculation criteria.
The restructuring also comes as Chinese memory manufacturers, including ChangXin Memory Technologies (CXMT), accelerate their technological development, increasing pressure on Samsung to convert advanced research into commercially competitive DRAM and NAND products.
The effectiveness of the new system will depend on how Samsung defines development milestones, recognises contributions across organisational boundaries and balances near-term product delivery with longer-term semiconductor research. Closer coordination and more consistent rewards could help the company retain essential expertise while improving the transition from next-generation memory technology to mass production.