DigiTimes评论文章复盘台积电-格芯20亿美元硅中介层协议，无新增事实

As global wafer capacity expands rapidly, TSMC and GlobalFoundries (GF) are highlighting a fast-growing market for mature processes serving advanced applications. In particular, demand for silicon interposers, through-silicon vias (TSVs), and embedded deep trench capacitors (eDTCs) in advanced packaging is creating a sizable blue-ocean market for mature-node capacity.

In AI chip manufacturing, the silicon interposer is an often-underestimated but critical component. Essentially an extremely thin silicon wafer, it serves as a "bridge" between AI computing cores and high-bandwidth memory (HBM).
Although silicon interposers are manufactured using mature processes, they support the most advanced AI packaging applications. Complementary technologies such as eDTC further demonstrate the differentiated value of specialty processes.
GF moves mature lines into AI
For US foundry giant GF, the five-year, US$2 billion agreement with TSMC provides a high-value outlet for mature-node capacity. The deal can significantly improve GF's capacity utilization while optimizing its product mix. Mature production lines can be freed from price competition in consumer chips and moved into the AI supply chain, where margins are higher and product cycles are longer.
On the other side of the deal, TSMC needs a scalable supply of silicon interposers to meet surging demand from downstream customers. Lacking a competitive edge in advanced logic processes, GF can instead use specialty processes and technically demanding "bridge" nodes to become an indispensable infrastructure provider in the chiplet era.
The result is a nuanced relationship that is both cooperative and competitive. The two companies compete directly in the mature-node foundry market, yet are now tied together through the advanced packaging supply chain.
Packaging becomes a second growth engine
From a technology-evolution perspective, the GF-TSMC partnership also reflects a broader industry trend. As transistor scaling approaches physical limits, semiconductor performance increasingly depends on advanced packaging to unlock system-level power and efficiency gains.
The formula for improving chip performance is shifting from a single-engine model based on process scaling to a dual-engine model combining process technology and packaging. Under this dual-engine model, silicon interposers will play an increasingly important role.
AI chips are growing larger, chiplet architectures are becoming more widespread, and HBM is advancing toward higher stack counts. As a result, demand for silicon interposers will keep rising, along with their technical complexity. Packaging is also expected to progress beyond today's 2.5D designs toward higher interconnect density.
China faces an ecosystem challenge
More broadly, the TSMC-GF partnership demonstrates a new form of competition and cooperation in the foundry industry. For TSMC, bringing in external silicon-interposer capacity while rapidly expanding its own production lines allows it to increase supply flexibility without diluting control over its core processes.
For GF, the agreement locks in a long-cycle, high-value source of orders for its mature-node capacity. A new division of labor around advanced packaging is now taking shape.
For China's semiconductor industry, the partnership once again maps out a clear path for technology evolution. Advanced packaging has become a strategic line of defense that determines AI computing performance, cost, and supply-chain security. Silicon interposers and the underlying 2.5D and 3D advanced packaging capabilities are likewise key links in the shift from available to independent computing power.
For Chinese companies, the challenge will be finding ways to move mature-node production lines into the high-margin, long-cycle AI supply chain while targeting the rapidly expanding blue-ocean market for mature processes in advanced applications.
Amid new shifts in global supply chains, the response increasingly points to yield and ecosystem development. Building deep, coordinated ties among China's domestic AI chip designers, packaging houses, and foundries, similar to TSMC's CoWoS ecosystem, has become an urgent challenge for China's industry.