📰 DigiTimesDigiTimesDoubao · 实盘不做把握 4/10不做原因:无增量信息
北京时间·🕒 发布 11:30:07·⟳ 抓取 12:28:50 +58m43s·⚡ 决策 09-15 12:42:47 +13m57s·42.1 天前
DigiTimes供应链综述称台积电3nm/2nm/CoWoS产能持续紧张，AWS扩投、联发科TPU调整配产，溢出订单流向日月光/Amkor/力成
这是一篇DigiTimes供应链综述，而非新订单/新指引事件：核心叙事（台积电3/2nm与CoWoS紧缺、CoWoS到2028翻倍、AWS/Google扩投）在9月13-14日已由TrendForce、Economic Daily系等广泛报道；唯一边际细节是溢出订单顺位与力成能见度到2028，但无金额、无官方确认，且主要受益封测/ASIC标的近5-20日处于明显下跌通道，软催化不足以形成正期望。
📄 原文DigiTimes↗ 原文
TSMC 3nm, 2nm, and CoWoS stay tight as AWS, MediaTek, TPU shift capacity
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不做 日月光投控(SPIL)（3711.TW）
溢出订单首顺位是唯一边际亮点，但无金额、无官方确认，板块处下行通道且消息午间已明牌，无正期望；等待公司法说或具体订单/营收上调再评估
不做 台积电（2330.TW）
超大市值+行业共识级软催化，无新增订单或指引数字，相对市值materiality不足
不做 联发科（2454.TW）
TPU信息多为既有，v9双封装方案引入分流使方向不纯粹，近20日已涨12.6%，无预期差
不做 力成科技（6239.TW）
满产与能见度2028仅定性、顺位靠后且无量化增量，存储封测周期下行交易主导
不做 Amkor（AMKR.US）
先进封装放量为5月纪要已知信息，本条无公司级新事实，且处FOMC前夜
不做 世旭-KY(Alchip)（3661.TW）
仅被点名为AWS合作方、无新订单，近5日-11%下行趋势明确，低位非做多理由
展开详情(成交明细 / 研究档案 / 原文全文 / 决策记录链)
研究档案
结论摘要
文章确认了台积电先进产能与CoWoS紧缺的已知行业趋势，边际信息仅为溢出封测顺位和力成满产，但均为匿名供应链说法且无量化增量；相关台股封测/ASIC链条近5日普遍下跌10-16%，市场交易的是2027供需而非综述级旧叙事，午间已被中文媒体快速转载，下午开盘即明牌，无短线edge，回避。
消息传播链
- CoWoS到2028年底扩至约26万片300mm等效月产能的扩产叙事已在9月13日传播，主叙事非新
- 台积电目标2027年中2nm+22%、3nm+16%、CoWoS 2028翻倍，在本文前一天已扩散
- 署名产业媒体原创供应链综述，新增细节为AWS新增高通合作、TPU v9双封装、溢出顺位SPIL>Amkor>力成、力成能见度2028；无金额
- 中文快讯在午间已转述同批供应链口径，A股/港股午休、台股13:30复盘前明牌化，午后无信息差
关键理由
- 产业链方向上CoWoS紧缺与OSAT溢出真实存在（KB佐证CoWoS-R已100%外包、Amkor先进封装2026收入近三倍），但本条不构成对任一上市标的的新增、可量化催化
主要风险
- 全部关键增量来自匿名supply chain sources与market talk，公司未确认，TPU v9双封装方案后续可能被否认或修正
- FOMC利率决议与点阵图在约1天后公布，风险偏好事件压过行业综述，不利于短线做多高beta半导体
反向证据
- 做多前查反向 · 来源 query_modeling_kb · 日期 2026-07-27 · 影响 weakens
KB显示CoWoS-R已100%外包、扩产路径激进（2028月产能约26万片），叠加相关封测/ASIC股近5日急跌10-16%，市场可能在交易2027紧缺缓解，削弱溢出订单利好
检索:CoWoS 2027 2028 供需 过剩 OSAT 封测 下调 - 做多前查反向 · 来源 web · 日期 2026-09-14 · 影响 weakens
同链封测/ASIC标的近5日与13周轨迹转弱，无本文对应的放量抢跑，说明该叙事尚未被当成利好重定价，软催化难独立扭转
检索:Powertech 力成 SPIL 日月光 利空 砍单 2026年9月
先例如何影响了这次决策
对本次决策的影响:先例不可干净对齐，叠加无新增事实与标的下行趋势，支持回避而非以模糊行业先例追多
方向:未构建：本条为多主体匿名供应链综述，缺少可锚定的单一公司、单日首发事件（核心叙事前1-2日已分批见报），无法构造首发锚干净的aligned先例
涨幅量级:不适用
形态:同主题台积电产能/CoWoS紧缺报道在2025-2026年反复出现，通常为板块beta级一日反应而非个股持续重定价；不足以据此设定tp/sl
工具执行结果 · 成功 4 · 降级 1 · 失败 0 · 取消 0
- search_processed_events 成功 stock_tools HTTP · 27 ms
{"result": "search_processed_events:agent query=`cowos spillover spil amkor powertech orders 2028 | tpu v9 cowos-l intel emib-t mediatek capacity | tsmc 3nm 2nm cowos capacity allocation aws annapurna mediatek google tpu`；结构化索引覆盖完整 72 小时；旧记录兼容扫描近 0.0/72 小时、0 条本臂决策(完整)，返回 0 条候选。未命中只表示这些 agent query 表 - query_modeling_kb 成功 stock_tools HTTP · 93 ms
{"result": "modeling_kb 命中 10 条 (库快照 2026-07-27 · AI 算力链 19 页 · 本次命中证据最新 2026-06-02 · 其中 ⟨预测⟩ 6 条) —— 这是**定期重生成的快照**,不是活数据;比快照更晚的事实以你手上的信号/kb_search 为准。\n\n• [A] CoWoS-S（全硅中介层） · CoWoS-S 产能走向（被改造为 L） · CY2025E = AP3 改造为 CoWoS-L ⟨预测⟩[1]\n 依据: TSMC 一边新建 AP6 专做 CoWoS-L，一边把 AP3 存量 CoWoS-S 改造为 L（否则 S - query_modeling_kb 成功 stock_tools HTTP · 37 ms
{"result": "modeling_kb 命中 10 条 (库快照 2026-07-27 · AI 算力链 19 页 · 本次命中证据最新 2026-04-27 · 其中 ⟨预测⟩ 5 条) —— 这是**定期重生成的快照**,不是活数据;比快照更晚的事实以你手上的信号/kb_search 为准。\n\n• [B] CoWoS-L · CoWoS 平台占比演进(%) · CY2026E = >55 % ⟨预测⟩[1]\n 依据: 2026 -L 成绝对主力(仅 NVDA -L booking 510K),Rubin/MI400 全迁 -L。\n [1] 进门财经(外资研报) - price_snapshot 降级 stock_tools HTTP · 10,072 ms
{ - web_search 成功 doubao_search · 1,713 ms
豆包搜索结果（原始查询:DigiTimes TSMC 3nm 2nm CoWoS AWS MediaTek TPU capacity readjustment September 2026；API SearchType:web）
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TSMC 3nm, 2nm, and CoWoS stay tight as AWS, MediaTek, TPU shift capacity
Monica Chen
, Hsinchu
Sep 15, 2026, 11:30
0
Credit: DIGITIMES
TSMC's 3nm, 2nm, and CoWoS advanced packaging capacity remained in short supply in late 2026's third quarter, as changes in major customer orders and front-end and back-end supply models prompted the foundry to adjust its advanced capacity allocation. Supply chain sources said Nvidia and Apple continue to dominate TSMC's advanced process and packaging resources, while AWS has recently expanded AI chip tape-outs, giving Annapurna more 3nm capacity.
Market talk indicates TSMC has recently "readjusted" its capacity allocation. After MediaTek won Google TPU orders, the next-generation TPU v9 will use both TSMC CoWoS-L and Intel EMIB-T, changing the front-end and back-end supply model and prompting a slight adjustment to MediaTek's 3nm and 2nm capacity planning.
The 2nm node is also set to see mass production, with AMD's EPYC server CPU code-named "Venice" and MI455X GPU expected to adopt it first in July 2026, alongside the A20 Pro chip for the new iPhone.
TSMC's biggest 3nm customer is currently Nvidia. Demand for 2nm capacity is centered on Apple and others. AWS subsidiary Annapurna has recently expanded tape-outs, adding to 3nm demand, while Google TPU production handled by MediaTek is also increasing orders at TSMC.
TSMC is also continuing to convert some 5nm equipment to 3nm, with a new 3nm line in South Taiwan Science Park expected to enter mass production in the first half of 2027. Its second Arizona wafer fab and second Japan fab are also planned to adopt 3nm production.
MediaTek's 3nm TPU v8t (ZebraFish) is expected to begin mass production in the fourth quarter and ramp in 2027. Besides handling ASIC design, MediaTek is also helping Google manage the foundry, advanced packaging, substrate, and materials supply chains needed for TPU mass production. To support that effort, MediaTek has brought in retired TSMC veterans to help resolve mass-production and supply-chain coordination issues.
AWS's larger Annapurna tape-outs have lifted its priority in TSMC's 3nm and CoWoS allocation. AWS continues to move its in-house chips into new generations, with partners including Alchip and Marvell, and it has recently added Qualcomm. As demand for in-house chips rises, AWS's demand for TSMC 3nm capacity is also increasing.
Meanwhile, TSMC's CoWoS shortage has also driven spillover orders in advanced packaging.
Supply chain sources said the priority order for these spillover orders starts with SPIL, followed by Amkor and Powertech Technology among OSAT providers. Although Powertech ranks lower in the spillover order queue, its packaging capacity is already fully utilized, and order visibility extends to 2028.
Demand for TSMC's advanced processes remains elevated. Estimates put overall utilization at about 96.2% at the end of September, with utilization from 16/12nm to 2nm at 100%, 45nm at 97%, and overall utilization at 8-inch fabs also close to 100%.
Article
translated by Charlene Chen and edited by Jack Wu
AI Search
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Column: When digital trust breaks — quantum risk rewrites supply chain resilience
ICT
1min ago
Corning sees CPO and glass core as new semiconductor battlegrounds
Tomorrow's Headlines
Sep 14, 18:47
China optical transceivers avoid US FCC curbs as NPO and CPO compete in high-speed links
Tomorrow's Headlines
Sep 14, 18:46
China's AIDC token costs hinge on access to advanced GPUs
Tomorrow's Headlines
Sep 14, 18:46
Home
Tech
Semiconductors
TSMC 3nm, 2nm, and CoWoS stay tight as AWS, MediaTek, TPU shift capacity
Monica Chen
, Hsinchu
Sep 15, 2026, 11:30
0
Credit: DIGITIMES
TSMC's 3nm, 2nm, and CoWoS advanced packaging capacity remained in short supply in late 2026's third quarter, as changes in major customer orders and front-end and back-end supply models prompted the foundry to adjust its advanced capacity allocation. Supply chain sources said Nvidia and Apple continue to dominate TSMC's advanced process and packaging resources, while AWS has recently expanded AI chip tape-outs, giving Annapurna more 3nm capacity.
Market talk indicates TSMC has recently "readjusted" its capacity allocation. After MediaTek won Google TPU orders, the next-generation TPU v9 will use both TSMC CoWoS-L and Intel EMIB-T, changing the front-end and back-end supply model and prompting a slight adjustment to MediaTek's 3nm and 2nm capacity planning.
The 2nm node is also set to see mass production, with AMD's EPYC server CPU code-named "Venice" and MI455X GPU expected to adopt it first in July 2026, alongside the A20 Pro chip for the new iPhone.
TSMC's biggest 3nm customer is currently Nvidia. Demand for 2nm capacity is centered on Apple and others. AWS subsidiary Annapurna has recently expanded tape-outs, adding to 3nm demand, while Google TPU production handled by MediaTek is also increasing orders at TSMC.
TSMC is also continuing to convert some 5nm equipment to 3nm, with a new 3nm line in South Taiwan Science Park expected to enter mass production in the first half of 2027. Its second Arizona wafer fab and second Japan fab are also planned to adopt 3nm production.
MediaTek's 3nm TPU v8t (ZebraFish) is expected to begin mass production in the fourth quarter and ramp in 2027. Besides handling ASIC design, MediaTek is also helping Google manage the foundry, advanced packaging, substrate, and materials supply chains needed for TPU mass production. To support that effort, MediaTek has brought in retired TSMC veterans to help resolve mass-production and supply-chain coordination issues.
AWS's larger Annapurna tape-outs have lifted its priority in TSMC's 3nm and CoWoS allocation. AWS continues to move its in-house chips into new generations, with partners including Alchip and Marvell, and it has recently added Qualcomm. As demand for in-house chips rises, AWS's demand for TSMC 3nm capacity is also increasing.
Meanwhile, TSMC's CoWoS shortage has also driven spillover orders in advanced packaging.
Supply chain sources said the priority order for these spillover orders starts with SPIL, followed by Amkor and Powertech Technology among OSAT providers. Although Powertech ranks lower in the spillover order queue, its packaging capacity is already fully utilized, and order visibility extends to 2028.
Demand for TSMC's advanced processes remains elevated. Estimates put overall utilization at about 96.2% at the end of September, with utilization from 16/12nm to 2nm at 100%, 45nm at 97%, and overall utilization at 8-inch fabs also close to 100%.
Article
translated by Charlene Chen and edited by Jack Wu
AI Search
Related stories
TSMC enters 2nm mass production, scales 3nm capacity
Nvidia and Apple compete for TSMC capacity, targeting A16 and A14 nodes
TSMC ramps 3/2nm and CoWoS capacity amid 24-hour production push
Categories
Chips + components IC design, distribution IC manufacturing
Tags
2026 2nm 3nm Apple AWS capacity CoWoS demand Google MediaTek Nvidia packaging production TPU TSMC
Companies
MediaTek Taiwan Semiconductor Manufacturing Company
Share this article
Other links
Related topics
Global supply chain: Key components
TSMC updates
BIZ FOCUS
Sep 14, 08:00
Hauman Unveils Micro LED Testing Breakthrough for AI Optical Interconnects
Monday 14 September 2026
Scaling Photonics: Assembly, Test and Fiber Automation at SEMICON Taiwan
Friday 11 September 2026
DAS Expands in Taiwan and Unveils World First at SEMICON
Friday 11 September 2026
Toward Technologies Redefines Relay Solutions at SEMICON Taiwan 2026
MOST-READ
7 DAYS NEWS
Google's v10 TPU opens door to AMD without sidelining Broadcom, MediaTek
Update: ABF substrate maker Unimicron searched in origin-labeling probe
Qualcomm's HBC play pulls Samsung and SK hynix into a new race beyond HBM
SK keyfoundry expands 8-inch capacity as China demand strains supply
Samsung, SK Hynix step up China NAND upgrades as US tool risks grow
The 1,000-watt problem: a TSMC veteran on the brute force forging Nvidia's AI chips
Wuliangye skips carmaking, turns liquor waste into silicon-carbon anodes
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Nvidia, MediaTek deepen 20-year chip ties
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