DigiTimes分析师解读台积电法说会：HBM4E定制base die或提前用N3P、传可能再建P10三奈米厂，并重提三星英伟达base die转单旧闻

Following TSMC's third-quarter 2026 earnings call, DIGITIMES analyst Luke Lin provided in a podcast additional analysis of several details that received limited attention in market coverage, including a new 3nm fab at the Southern Taiwan Science Park (STSP), the transfer of Nvidia-related high-bandwidth memory (HBM) base die orders to TSMC, and whether demand for A14 includes Intel server CPUs.

HBM base die demand supports another 3nm fab
Lin said that, in addition to the previously announced Fab 18 P9 facility, TSMC is expected to sign an agreement with the Tainan City Government in mid-2026 to acquire land for another 3nm fab at the STSP. The facility may be designated P10 and is expected to begin volume production in the first half of 2028.
That would put the time from construction to volume production at only about 1.5 to two years, an exceptionally rapid pace. On the surface, the expansion appears contradictory: by then, most leading customers' smartphone and high-performance computing (HPC) applications will have shifted to 2nm or more advanced processes, seemingly freeing up 3nm capacity.
In addition, TSMC's Arizona P2 fab is scheduled to begin production in the third quarter of 2027, while its second fab in Kumamoto, Japan, is also planned to enter production in 2028. In theory, 3nm capacity should be more than sufficient by 2028, yet TSMC continues to expand its fab footprint.
Lin said the key source of demand is customized HBM base dies for AI accelerators, with customers including Nvidia, AMD, and Google.
TSMC's original technology roadmap indicated that N3P customized base dies would be introduced starting with the HBM5 generation. However, supply-chain information now suggests that the technology could be brought forward for use with HBM4E.
Lin said the sharp rise in memory prices has prompted AI chipmakers to reassess HBM capacity and the pace of generational upgrades. Some companies are delaying HBM5 adoption, meaning customized functions could instead be introduced earlier through HBM4E.
Notably, an AI accelerator can carry six to eight or even more HBM stacks, each of which requires a base die. As more AI ASIC developers adopt customized designs, they will create substantial demand for 3nm wafers.
As compute dies in AI accelerators shift from standard base dies to customized versions—with some memory-control functions and lightweight computing moved to the base die—more advanced logic processes are required. TSMC's N3P has therefore become the primary process for these products.
Demand for server CPUs driven by agentic AI, together with some midrange CPU products that will continue using 3nm through 2028, is also expected to support TSMC's continued expansion of 3nm capacity after 2028.
Consistency may drive Samsung's HBM order shift
Addressing media reports that Samsung Electronics' customized HBM base dies for Nvidia will be produced by TSMC, Lin said the move does not necessarily indicate problems with Samsung's technology or yield.
Micron and SK Hynix already produce their base dies on TSMC wafers. If Nvidia chooses to have all of its base dies manufactured by TSMC, it would not need to maintain two designs to accommodate different foundries. The move would also help ensure consistency in base die performance and power consumption.
Another consideration could be Samsung's 2nm capacity planning. By the time Nvidia made its decision, Samsung's planned 2nm capacity may have been allocated to other uses, including its own chips and external customers such as Tesla. As a result, Samsung might not have been able to offer Nvidia a capacity plan that met its requirements.
A14 demand exceeds N2, with Intel server CPUs unconfirmed
Several analysts asked during the earnings call whether TSMC's forecast that future demand for A14, its 1.4nm process, will exceed demand for N2, its 2nm process, already includes potential orders transferred from Intel server CPUs.
Intel currently uses TSMC only for PC chips, while its server CPUs remain on its own production lines. TSMC said it would consider customers' capacity-expansion plans but did not directly confirm whether Intel server CPUs were included in its forecast.
Lin also offered an observation on the technology schedule. Volume production of 3nm and 2nm processes is separated by about three years, while the gap between 2nm and A14 is only about 2.5 years. A14 is therefore expected to enter volume production in the first half of 2028, indicating that TSMC is accelerating its development schedule.
The first customer could be Apple for its iPhone processors.
TSMC leads on technology and capacity
Lin concluded that TSMC's combination of advanced-process leadership and large-scale capacity makes it difficult for Intel and Samsung Electronics to compete. TSMC Chairman and CEO C.C. Wei has emphasized that the company will not deliberately reserve orders for competitors, but geopolitical considerations and customers' efforts to secure second sources will still push some overflow orders to rivals.
Lin also cautioned that major cloud-service providers, including Google, Meta Platforms, and Amazon, have relied on debt or new share issuance to fund data-center construction. Meanwhile, the declines in the share and bond prices of pure-play computing providers such as CoreWeave indicate that the market has begun to question the expansion of AI financing.
Those external variables will need to be factored more heavily into TSMC's assessment of the pace of future capacity expansion.