DigiTimes 英文综述长鑫科技4F² DRAM路线图与前三季业绩，无新增事实且业绩数字少写一个数量级

Chinese DRAM maker CXMT is targeting higher-density manufacturing. At a recent shareholder meeting, management pledged to enter what it called the "uncharted territory" of extreme memory scaling, using process innovation to overcome technical barriers.

The company says it has developed a 4F² DRAM architecture and made progress in proprietary vertical surrounding-gate (VSG) transistors and hybrid bonding. These advances offer alternatives to conventional planar DRAM scaling as CXMT pursues the industry's three largest suppliers.
According to a recent report by 21st Century Business Herald , CXMT held an extraordinary shareholder meeting at its Hefei headquarters. Executives said its Hefei and Beijing fabs were maintaining high utilization with ample orders, and that the company would respond to market changes through product diversification and cost improvements.
Earlier reports by STAR Market Daily and other Chinese media said CXMT had completed five generations of DRAM technology platforms, with products spanning DDR5, DDR5X and LPDDR6. The company plans to continue investing in advanced processes and new architectures.
CXMT targets denser server memory with 4F² DRAM
CXMT's most closely watched recent advance is its 4F² DRAM architecture, whose successful development CEO Mark Cao formally announced. The company plans to launch next-generation DDR5 RDIMM server memory combining 4F² and hybrid bonding by the end of 2026.
Mainstream DRAM cells use a 6F² architecture, where F denotes the minimum process feature size. A 4F² design theoretically reduces each cell's planar footprint by about one-third, increasing storage density and creating scope to lower cost per bit.
CXMT is pursuing transistor scaling through process advances, including its proprietary VSG transistors. Their vertical structure strengthens gate control over the channel, reducing leakage, short-channel effects, and transistor footprint.
Hybrid bonding allows memory arrays and peripheral logic circuits to be fabricated separately and then bonded together, easing the design and scaling constraints of conventional monolithic processes. CXMT has reportedly accumulated hundreds of patents in this field.
These developments give substance to management's reference to "uncharted territory." Further DRAM scaling raises challenges in transistor control, leakage, process integration, and yield; 4F² seeks to sustain density gains by redesigning the memory cell itself.
CXMT's fifth-generation DRAM platform, G5, has also entered mass production. The company says output per wafer is more than 50% higher than on the previous platform. Its LPDDR6 memory delivers transfer speeds of 12,800Mbps while consuming 20% less power than its LPDDR5X products.
From G5 and LPDDR6 to the planned year-end 4F² DDR5 RDIMM launch, CXMT's roadmap addresses wafer productivity, low-power memory for mobile devices and AI applications, and demand for high-density server DRAM.
CXMT forecasts revenue of CNY265-270 billion (approx. US$39.67-40.42 billion) and net profit attributable to the parent company of CNY131-132.5 billion for the first nine months of 2026. In the same period of 2025, revenue was CNY32.084 billion, with a net loss of CNY5.28 billion.
The company attributed the improvement to rapid growth in AI computing demand, tighter DRAM supply and higher prices, alongside sustained high capacity utilisation, increased output per wafer and a better product mix.