台积电、三星、英特尔集体背书 ASML High-NA EUV（台积电2030、三星2028、Intel已量产），并与 ASML 共同推进 6×12 英寸光罩路线（2031 试产线、2033 就绪）

TAIPEI -- Taiwan Semiconductor Manufacturing Co. said on Tuesday that it will begin using the world's most advanced chipmaking tool made by ASML from 2030, while Samsung Electronics is targeting adoption as early as 2028 and Intel said it is already mass producing with the new machine.
The moves by the world's three leading chipmakers come as the race to produce ever more powerful artificial intelligence computing chips continues to heat up.
The high numerical aperture extreme ultraviolet lithography machine is built exclusively by ASML of the Netherlands. As the successor to standard EUV lithography machines, high NA EUV allows chipmakers to print even tinier patterns and circuit designs, paving the way for more powerful and energy-efficient chips.
Standard EUV lithography machines are already used by top chipmakers to produce chips at or beyond 7-nanometer grade. Generally, the smaller the nanometer size, the more advanced, powerful and complex the chips are.
The high NA EUV lithography machine is the world's most expensive chipmaking equipment, carrying a price tag as high as 350 million euros ($407 million). That is more than double the standard EUV tool at $200 million per system and nearly four times more expensive than an F-35 fighter jet.
The announcements by Intel, Samsung and TSMC mark a significant endorsement for the Dutch chipmaking tool supplier and its next-generation technology. Their commitments also ease concerns that such cutting-edge lithography technology could be too expensive and advanced for widespread industry use.
TSMC executives had previously said it was too costly to start using the enhanced version of the tool, even though it, along with Samsung, was among the first adopters of ASML's standard EUV machines, back in 2019.
Intel by contrast was slower to shift to standard EUV, relying instead on older lithography tools. That decision led to lower production yields for certain CPUs, or central processing units, and delays in its roadmap for introducing new products, according to industry executives. It has been more proactive in introducing high NA EUV, receiving its machine in 2024. The company said it started using the tool for "select layers" of chips made with its 18A production process this year.
Samsung, meanwhile, said it plans to introduce the high NA EUV machine for DRAM memory chips by 2028 in what would be a first for that industry.
"The AI era is transforming the semiconductor industry and increasing the importance of technological innovation across the entire value chain," said Young Hyun Jun, vice chairman and CEO of Samsung Electronics. "Samsung is committed to maintaining leadership in advanced semiconductor manufacturing, including memory and foundry, through breakthrough technologies and strong partnerships."
Currently, only TSMC, Intel and Samsung are economically and technologically able to mass produce the world's most advanced logic chips. Chinese chipmakers like Semiconductor Manufacturing International Corp. are barred by U.S. and Dutch export curbs from buying ASML's cutting-edge chip production tools, though they are still aggressively pursuing more advanced chipmaking capabilities with less advanced tools. China is also looking to build its own answer to ASML. Japan's Rapidus, meanwhile, aims to produce cutting-edge chips with ASML's EUV machines, but on a smaller scale initially.
TSMC and ASML, meanwhile, announced plans on Tuesday to overhaul photomasks, or the templates used to transfer circuit patterns onto wafers, for the latest tool. The two companies will work together to transition from the 6-inch masks used today to 12-inch versions to maximize the efficiency and capabilities of the high NA EUV tool. Intel and Samsung also said they both back the overhaul of the mask ecosystem and would join the push to build larger masks for next-generation chip production.
"We have always believed that when the industry works together to solve complex problems, we unlock possibilities that no single company could achieve alone," said TSMC Chairman and CEO C.C. Wei. "By bringing together expertise from across the industry's value chain, we hope to keep providing the benefits of cutting-edge technology through continuous innovation that lowers barriers and puts advanced solutions accessible at scale."
Christophe Fouquet, president and CEO of ASML, said, "We expect the adoption of high NA EUV to increase progressively along the device scaling roadmap, first using current 6-inch masks and then further supported by 12-inch masks, which enable greater scanner productivity and allow the industry to meet the demand for smaller, faster and more energy-efficient chips."
TSMC and ASML aim to build a 12-inch mask pilot line by 2031 to support full lithography system readiness for advanced chip production by 2033.