Cadence与NVIDIA在Computex 2026发布面向芯片到系统验证的自主AI代理方案

AI agents can understand design intent and implement meaningful portions of the design process.
For decades, the semiconductor industry has tackled growing complexity the same way: add more engineers, throw more compute at the problem, and extend schedules. That approach worked when complexity increased incrementally. Today, it no longer scales.
Design teams that once numbered in the dozens now span thousands of engineers. Verification requires billions of compute hours every year. What used to take days can now take weeks, and the gap between engineering ambition and available resources continues to widen.
The industry is reaching a turning point.
Cadence, in collaboration with NVIDIA, is advancing a fundamentally different way forward: autonomous AI agents that can understand design intent, reason through complex engineering challenges, and implement meaningful portions of the design process with minimal human intervention.
Generative AI showed that models can help engineers write code. The next step is far more significant: AI systems that can take ownership of engineering tasks, evaluate results, decide what to do next, and continuously drive toward closure.
That evolution begins with NVIDIA Nemotron 3 Ultra.
Nemotron 3 Ultra now leads among open models in agentic RTL coding on the Comprehensive Verilog Design Problems (CVDP) benchmark. Combined with the ACE-RTL agent developed by NVIDIA Research, it goes beyond code generation. It can reason about hardware architecture, iterate on its own outputs, and pursue functional correctness through autonomous problem-solving.
Equally important, enterprises can customize and deploy the model with their own design data. Rather than relying on opaque cloud-based systems, engineering organizations can preserve data privacy, maintain control over IP, and embed decades of accumulated design expertise directly into their AI workflows.
NVIDIA is extending this foundation even further through new capabilities in the NVIDIA Agent Toolkit, providing the infrastructure on which Cadence AI Super Agents are built.
The real breakthrough happens when these models are connected to trusted engineering tools and workflows.
At Computex 2026, Cadence announced that the ChipStack AI Super Agent achieved Level-5 autonomy and will now support NVIDIA Nemotron 3 Ultra models secured by NVIDIA OpenShell runtime.
For companies operating at NVIDIA’s scale, verification represents one of the largest engineering investments. Thousands of engineers spend billions of compute hours every year validating increasingly complex designs.
The ChipStack AI Super Agent changes that equation.
Instead of manually driving each step of the verification process, engineers can direct autonomous agents that simultaneously implement hundreds of simulations using Cadence Xcelium Logic Simulation and Jasper Formal Verification. Work that traditionally required five weeks can now be completed in less than a day—delivering more than 40X faster RTL validation cycles.
More importantly, the ChipStack AI Super Agent is not simply automating individual tasks. It continuously evaluates results, determines the next best action, and moves through the complete workflow—from specification understanding and RTL development to verification planning, formal analysis, simulation, debugging, and convergence.
The engineer’s role shifts from implementing tasks to supervising outcomes.
This autonomy is possible because the agents are grounded in Cadence’s signoff-accurate simulation technologies—the same proven engines used for production tapeouts. NVIDIA OpenShell provides the governance layer required for enterprise deployment, helping organizations maintain IP protection, security controls, and operational oversight.
The result is AI that can participate in real engineering work, not just assist with it.
Modern innovation no longer stops at the silicon boundary.
As AI infrastructure grows increasingly complex, challenges in advanced packaging, PCB design, thermal management, and system optimization have become just as critical as the chip itself.
To address this broader problem, Cadence introduced the AuraStack AI Super Agent on Cadence Allegro AI Studio, the industry’s first agentic AI platform focused on PCB and advanced packaging design.
Built on NVIDIA Agent Toolkit and powered by NVIDIA Nemotron 3 Ultra, the AuraStack AI Super Agent coordinates specialized agents across planning, implementation, and multiphysics analysis. Accelerated by NVIDIA Blackwell architecture and CUDA-X libraries—including cuDSS running on the Cadence Millennium M2000 Supercomputer—it brings agentic AI to the full system design process.
The impact is substantial:
Perhaps most importantly, the AuraStack AI Super Agent introduces a unified multiphysics environment where electrical, thermal, and mechanical interactions can be evaluated concurrently. Problems that would traditionally surface late in development can now be identified and resolved much earlier, reducing costly redesign cycles and accelerating system convergence.
NVIDIA engineers are already using the AuraStack AI Super Agent to tackle some of the industry’s most demanding AI infrastructure challenges.
With the introduction of the AuraStack AI Super Agent, Cadence has assembled the industry’s most comprehensive portfolio of agentic AI solutions, spanning the entire electronic system design flow.
Together, Cadence’s AI Super Agents create an integrated autonomous engineering ecosystem powered by NVIDIA Nemotron 3 Ultra, Blackwell, and CUDA-X:
The combination of Cadence’s engineering expertise and NVIDIA’s AI platform is creating something neither company could deliver independently: a physics-accurate, governed, silicon-to-system agentic engineering stack capable of transforming how electronic systems are designed.
A year ago, many of these workflows would have sounded aspirational.
Today, they are real.
The industry’s conversation is no longer about whether AI can assist engineers. The question is how quickly autonomous engineering systems will become part of every design team’s workflow.