三星电子选定 FormFactor 与旺矽(MPI)探针台自建硅光 PIC 晶圆测试线，目标年底完成内部验证、2027 年推出硅光代工服务

Samsung Electronics has selected the same test equipment suppliers used by Taiwan's TSMC for its silicon photonics development, a technology that uses light to reduce semiconductor bottlenecks, heat generation and power consumption. Samsung plans to complete in-house testing of photonic integrated circuit (PIC) wafers for silicon photonics by the end of this year.
According to industry sources on Sept. 7, Samsung is testing silicon photonics PIC wafers using probe stations from US-based FormFactor and Taiwan-based MPI. The probe stations are connected to optical and electrical measurement equipment to measure characteristics in the wavelength domain and frequency domain. The key is to verify whether optical devices fabricated on the wafer transmit light as designed and properly convert between electrical and optical signals.
Probe stations are used to measure the characteristics of semiconductor devices. They hold a wafer or individual die in place and connect probes carrying electrical signals to electrodes, linking the device to external measurement equipment. Silicon photonics probe stations add the ability to precisely align optical fibers with the optical input and output ports of a PIC. Measurement equipment sends optical and electrical signals and measures the outputs, while the probe station moves the wafer to repeatedly test each die.
"Samsung Electronics is conducting its own evaluation of PIC wafers with the goal of completing it by year-end," an industry official said. "It is using probe stations from the two suppliers that have passed TSMC's equipment qualification for CPO and silicon photonics testing."
TSMC uses probe stations from FormFactor and MPI to develop and validate COUPE (Co-Packaged Optical Engine), its silicon photonics-based co-packaged optics (CPO) platform. So far, the two companies are the only probe station suppliers to have passed TSMC's qualification process for CPO-related test equipment.
Samsung had outsourced PIC wafer validation to external organizations including Belgium-based semiconductor research institute imec since last year. It has now established its own testing environment and is conducting repeated evaluations. The company is at the optimization stage, evaluating the performance of PIC wafers based on its initial designs and feeding measurement results back into the design process.
Samsung is also preparing for customer evaluations. Global networking and communications semiconductor companies including Broadcom have been cited as potential customers. Samsung said during its first-quarter earnings announcement that it had secured a project from a major optical communications module company, establishing a foundation for its silicon photonics business. It said mass production for the project would begin in the second half.
A PIC integrates optical devices including waveguides that carry light, modulators that convert electrical signals into optical signals, and photodetectors that convert optical signals into electrical signals. Samsung measures characteristics in the wavelength and frequency domains to optimize optical loss, wavelength response and bandwidth.
After PIC testing, Samsung plans to expand testing to optical engines that combine an electronic integrated circuit (EIC) with a PIC. The EIC processes and amplifies electrical signals to drive the PIC's optical devices. An optical engine is formed by stacking the EIC and PIC and integrating optical paths that connect them to external optical fibers. Time-domain measurements are expected to be added during optical engine testing to verify actual high-speed data transmission performance.
Samsung plans to launch silicon photonics foundry services in 2027. It will provide optical device process technologies, optical device libraries and process design kits (PDKs). Customers will use these technologies to design PICs, which Samsung Foundry will manufacture in wafer form. Samsung began developing optical engines combining EICs and PICs this year and plans to begin testing them next year.
The ultimate goal is to package the optical engine together with logic chips and high-bandwidth memory (HBM). In a recently unveiled mockup, Samsung showed a structure in which a logic chip and optical engine are placed together on a silicon interposer. The PIC and EIC inside the optical engine are vertically stacked using technologies including hybrid bonding to shorten connection distances. Samsung plans to eventually expand CPO applications from network switches to GPUs and CPUs.
"We are currently developing optical devices including PICs ourselves," Choi Won-kyung, vice president of Samsung Electronics' Semiconductor R&D Center Advanced Package Lab, said at Nano Korea in July. "We plan to enter the silicon photonics market by focusing on developing an optical engine that integrates EICs, PICs and optical connections, and then expand its application to switches, GPUs and CPUs."