Semiconductor Engineering周报汇总多条半导体与AI硬件新闻，核心可交易信息已由Reuters、FT等提前披露并被市场重定价

Gartner says AI inferencing costs per agentic workflow will increase fivefold through 2028, with the rate of innovation outpacing the cost curve.
Samsung increased pricing on new 4nm, 5nm, and 8nm foundry orders by up to 15%, reports Reuters. Its Pyeongtaek 4nm line is reportedly running at full capacity. SMIC also raised prices per last week’s earnings call.
New offerings
Mitsubishi Chemical will commercialize ultra-high-purity colloidal silica for wafer polishing and CMP slurries used on interconnect layers. The company will build new facilities at its Kyushu Plant, with an expected operational date of October 2028.
Cerebras introduced a rack-scale system containing three of its latest Wafer Scale Engine chips, which each provide up to 250 PFLOPS of AI compute with 43.2 PB/s of memory bandwidth.
Silvaco and Dassault Systèmes will co-develop interoperable digital twin workflows for semiconductor manufacturing, spanning equipment-scale plasma simulation, feature-scale semiconductor process modeling, and structural analysis.
Socionext added Intel 18A-P to its custom-SoC roadmap, starting with a high-performance compute chiplet for AI and data centers, providing another external customer win for Intel Foundry’s leading-edge process.
Marvell will develop custom silicon for Google’s TPU ecosystem, potentially including inference accelerators, NICs, and memory interface controllers, while Google can buy up to $12.2B worth of Marvell shares.
Nvidia plans to invest $1.5B in and provide credit support for SoftBank’s SB Energy, which will build and operate a new 8 GW data center in Ohio that uses Nvidia chips and will be leased by OpenAI.
Etched raised $700M to deliver its frontier model inference rack-scale system made up of co-designed chips, packages, PCBs, cold plates, and interconnects. This follows $300M announced last month.
Velaura AI raised $110M to commercialize its ultra-low-power digital chip IP and design platform for data center XPUs and physical AI.
Broadcom is reported seeking $60B in debt funding to finance an AI chip deal, per Bloomberg.
Research programs
The newly released National Security Science and Technology Strategy directs federal agencies to prioritize semiconductor R&D spanning EDA, advanced manufacturing equipment and processes, heterogeneous integration and advanced packaging, AI/RF/optical hardware, 2D materials, and integrated photonics.
Micron plans to spend $10B over the next decade on a new research lab in Boise, Idaho. Research areas will include memory technologies, advanced memory and compute architectures, packaging, and manufacturing.
SRC launched a +$13M industry-driven project-based university research program spanning design, manufacturing, and packaging.
UT Austin researchers are calling for broader access to advanced packaging facilities for universities, national labs and other researchers developing low-volume, high-value systems. Based on input from more than 70 experts, the ‘Chips For Science’ report argues that expanded packaging infrastructure is needed to capitalize on U.S. semiconductor manufacturing investments.
Humanoids and robotics
An Intel-commissioned study found a growing robotics “readiness gap,” with 60% of leaders expecting to operate robot fleets within five years but only 40% currently having a formal human-robot workforce strategy. Skills shortages, safety concerns, and insufficient edge AI infrastructure remain key barriers.
Meanwhile, China’s robot market is expected to hit $2B in 2026, with another 60% growth in 2027. However, profit remains a key challenge, reports Trendforce.
IDC estimates U.S. humanoid robot shipments could be 58% below its baseline by 2030 under a worst-case scenario in which current FCC restrictions remain in place, as U.S. developers continue to depend on China for core components. IDC estimates China currently accounts for 82% of global humanoid shipments, while U.S. builders are not expected to reach scaled mass production until late 2028.
Find all the recent earnings across 80 chip companies in this roundup.
Hot Interconnects
At this week’s Hot Interconnects conference, Arista demonstrated a 12.8-Tb/s, 64-channel liquid-cooled XPO optical module operating at 212 Gb/s per channel, reporting about 130 W total power, and performance meeting emerging IEEE 802.3dj/df requirements.
Fig.1: Fundamental Interconnect Challenges. Source: Ciena/Hot Interconnects
ATLANT 3D released a platform that combines atomic layer processing with AI-driven materials discovery and validation for semiconductors, advanced packaging, and quantum.
Coherent started sampling 300mm high thermal conductivity SiC substrates.
Prodigy Technovations debuted a UFS 5.0 protocol exerciser and analyzer for flash memory interfaces.
IP, systems andinterconnects
Synopsys validated a 3D PCIe 6.0 PHY test chip that delivers up to 128.0 GB/s through an 8-lane configuration with PAM4 signaling.
StarFive unveiled RISC-V processor IP with a deep out-of-order execution architecture designed for the server market.
Vuzix started sampling a waveguide bridge for CPO/NPO interconnects in AI data centers.
Research
NUS researchers demonstrated 0.8-nm amorphous carbon with a dielectric constant of 1.35, high breakdown strength and metal-ion barrier properties, targeting advanced interconnects, CMOS scaling, and monolithic 3D integration.
A UT Dallas-led team developed a closed-loop digital twin for IGZO oxide-semiconductor transistors that combines fabrication, characterization, circuit simulation, surrogate modeling, and Bayesian active learning. The researchers extended it to 1T-1C DRAM optimization and reported roughly 5×, 4× and 3× reductions in experimental effort for device optimization, performance/reliability co-optimization and DRAM optimization, respectively.
U. of Alberta researchers developed a differentiable chip placement method that optimizes directly for post-route PPA rather than relying mainly on wirelength proxies.
U. of Strathclyde and U. of Edinburgh researchers show the “scalability of the optoelectronic platform and the feasibility of ORRAM to interface with spatially-multiplexed optical sources to bring neuromorphic technologies directly into applications that process and sense in the optical domain.”
KAIST developed a semiconductor neuron that tunes and exploits memristor current noise rather than suppressing it. Varying the memristor’s resistance adjusts spike probability, allowing one circuit to selectively encode different time-series frequency ranges for neuromorphic processing.
Siemens and Reinhausen are developing a solid-state transformer for up to 36kV grid voltage that delivers 800 VDC output for AI data centers.
Satellite company CesiumAstroacquiredJariet Technologies, a provider of RF signal processing ICs.
More fundings
SweGaN raised $14M to scale production of GaN-on-SiC epitaxial wafers.
Solinide Photonics raised ~$4.7M to commercialize multi-wavelength silicon nitride photonic ICs with integrated frequency combs for co-packaged optics.
Singular Photonics raised $2.15M to develop SPAD-based image sensors that integrate on-chip computation.
Georgia Tech researchers are developing AI cyber protections for the state’s existing highway infrastructure, including using AI to detect crashes, stalled vehicles, wrong-way drivers and traffic volume changes.
Attacks & Alerts
TU Graz and other researchers demonstrate that a Cloudflare framework’s Spectre defenses can be bypassed using microarchitectural timing amplification, enabling a remote attack that leaks JWT tokens from co-located victim workers at up to 12 bits/second. This is orders of magnitude faster than prior attacks, and it prompted Cloudflare to deploy new hardware- and software-based mitigations.
The U.S. DOJ indicted 17 members of the Iran-based Mabna Institute in connection with an alleged years-long cyber theft campaign that targeted data from dozens of U.S. universities and companies.
Waymo revealed the chip architecture, processor specs, and internal component details for its vehicles’ compute systems, including a custom 5nm ASIC. The company likened its in-vehicle architecture to a “data center” on wheels.
LG began mass producing a 5G R-16automotive telematics module that integrates communications and up to 12 antennas in one unit. The system supports 5G, Wi-Fi, GNSS and V2X for SDVs, with deliveries underway to a premium European automaker.
LG started battery production at its new 226-acre facility in Lansing, MI. The facility will produce LFP battery cells for ESS and NMC cells for Toyota vehicles.
EVs
Samsung and Volkswagen rolled out a new digital key feature that allows Samsung Galaxy smartphone users to lock, unlock, and start VW EVs from their phone’s wallet.
Hyundai debuted the GV90, its new flagship electric SUV for its Genesis luxury vehicle brand. The 7-seater has an estimated range of approximately 500km.
Heart Aerospace conducted a test flight of the largest-ever battery electric aircraft. The company’s 76-foot-long X1 demonstrator aircraft flew for 27 minutes in a test, reportedly using approximately $5 in electricity.
The FAA announced a series of test flights for Electra’s hybrid-electric aircraft testing routes connecting small local airports to major airline hubs.
Vehicle research
Korean and Japanese researchers demonstrated in-air copper sintering for automotive power-semiconductor packaging. TO-247-3L packages retained 37–44 MPa bonding shear strength after 1,000 hours at 250°C, supporting Cu sintering as a potential alternative to Ag sintering for high-temperature die attach.
Synopsys’ Manmeet Walia talks about the unprecedented changes underway to enable faster training and inferencing, and the collection of new technologies needed to make this all work, from 3.5D and 3D-ICs to the disaggregation of memory into tiered structures.
Quantum
IBM joined and cooled down two cryogenic modules into a single environment, a step toward a future modular ultra-cold system that links hundreds of quantum chips.
MIT researchers developed a room-temperature cavity-magnonic device that generates strongly correlated microwave signals using coupled magnons and photons, eliminating the cryogenic cooling typically required by superconducting approaches. The work could provide a path toward future quantum sensing, radar, and communications, although the current demonstration operates in the classical regime.
Cornell researchers developed a krypton-based sputtering process that cuts tantalum deposition temperatures for superconducting quantum devices from above 400°C to 200°C, making the process compatible with semiconductor back-end manufacturing.
National Network for Microelectronics Education (NNME) formed its first Industry Advisory Committee, bringing together companies including Lam Research, Intel, ASML, GF and others to help identify skills gaps and shape U.S. semiconductor curricula and workforce training.
AMD inked an MoU with Mexico’s science ministry for workforce training in HPC, AI, and semiconductors.
India’s government said it is now providing advanced chip-design tools to more than 332 academic institutions and 105 startups. SEMICON India 2026 will also include dedicated workforce-development activities.
People
SIA named Michael Robbins president and CEO, effective Oct. 1, succeeding John Neuffer.
Kulicke & Soffa named Raj Talluri president and CEO, effective Sept. 1.
Reducing variation in manufacturing, monitoring behavior over time, and targeting specific workloads can have a big impact on power, performance, and area/cost.
S. Korea goes All In on AI; new Dresden power fab; Intel expansion; GM secures memory supply; AI power management funding; mature-node foundry capacity; 300mm fab equipment; McKinsey's map of strategic IC supply; security threats; AI burnout.
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