📊 TrendForceTrendForceDoubao · 实盘不做把握 4/10不做原因:风险收益比不佳
北京时间·🕒 发布 10:35:20·⟳ 抓取 10:35:39 +19s·⚡ 决策 10-19 10:48:23 +12m44s·8.2 天前
传闻英伟达要求三星、SK海力士、美光的NVHBM基底裸片统一采用台积电3nm工艺,主受益市场周末闭市且无直接A股映射
消息为未获官方确认的媒体传闻(且9月ZDNet已有双轨报道,属增量有限的跟进),最直接受益的台积电为超大市值、单一基底裸片品类增量占营收极小(软催化),三星/SK海力士/美光净影响中性甚至代工利益外移;直接标的所在的台、韩、美股均周末闭市,消息自10月18日已扩散,周一开盘存在price-in与见光死风险,A股此刻虽开盘但无直接因果映射标的,风险收益不支持进场
📄 原文TrendForce↗ 原文
[News] NVIDIA Reportedly Pushes TSMC 3nm NVHBM Base Dies for Samsung, SK hynix, Micron in Unlikely Foundry Tie-Up As pr…
不做 台积电(2330.TW)
未证实韩媒传闻+超大市值软催化,单一NVHBM基底裸片增量占营收极小;台股周末闭市,消息10月18日已扩散,周一开盘price-in/高开低走风险高于剩余edge,无官方确认前不追
不做 三星电子(005930.KS)
存储获益与代工让渡多空交织,净方向不明且为传闻,韩股闭市,无交易edge
不做 A股HBM/先进封装主题标的(N/A)
NVHBM基底裸片为台积电3nm逻辑代工环节,A股无直接承接的公司或已坐实订单,仅主题情绪联动,因果与量级均不足,不借盘中情绪开仓
展开详情(成交明细 / 研究档案 / 原文全文 / 决策记录链)
研究档案
结论摘要
英伟达推动三家HBM厂将NVHBM基底裸片统一交台积电3nm代工,方向上利好台积电产能与先进制程份额、对三星代工略不利,但这是未经确认的韩媒传闻且为9月旧线索的跟进,增量金额对超大市值台积电不构成可交易弹性;直接市场全部闭市、消息已扩散,A股无直接映射,故回避。
消息传播链
- 韩媒报道英伟达要求三家HBM供应商NVHBM基底裸片采用台积电3nm,三星DS部门据称同意;原始韩网链接未直接取得,时间精确到日
- 消息在TrendForce英文版前已进入中文财经渠道,说明周一开盘前已有约半天扩散
- TrendForce整合首尔经济日报两篇报道并补充台积电10月15日财报3nm产能信息,属二次研究包装而非独家首发
关键理由
- 直接受益方台积电为超大市值公司,NVHBM基底裸片仅为3nm产能中一小块,相对营收/市值的增量弹性不足以驱动短线定价
- 该消息10月18日已由韩媒及中文财经媒体扩散,直接市场周一开盘时传闻大概率已被消化,且无官方确认,追高风险高于剩余edge
主要风险
- 若英伟达/台积电周末官方确认并披露超预期投片或份额细节,台积电及HBM链周一可能跳空,回避将错过行情
- 若相关公司否认或缩减安排,亦证伪该传闻;当前无任何一方官方表态,消息真实性未坐实
反向证据
- 做多前查反向 · 来源 web · 日期 2026-10-19 · 影响 weakens
报道本身即显示三星保留2nm替代方案、且标准HBM4/HBM4E及AMD定制订单基底仍由三星自有4nm生产,说明台积电获益范围被限定在NVHBM单一品类,削弱利好量级
检索:NVHBM 台积电 3nm 否认 三星 自产 2nm 反证 原文 ↗ - 做多前查反向 · 来源 web · 日期 2026-10-19 · 影响 weakens
3nm已占台积电Q3晶圆销售33%且AI/手机需求争抢产能,新增基底裸片更多是产能分配而非增量产能弹性,且台南新厂2028H1才量产,短期业绩弹性有限
检索:台积电 3nm 产能 满载 NVHBM 新增订单 弹性 原文 ↗
先例如何影响了这次决策
对本次决策的影响:未产生标的或方向改变;证据薄与市场闭市叠加,支持不进场而非以小仓试探
方向:无可用对齐先例;未构造event_study面板,因为直接标的市场闭市且本次不进场,先例幅度不改变回避结论
涨幅量级:不足以校准幅度:无干净锚点的同市场、同相位(周末传闻→周一开盘)HBM代工传闻先例被坐实
形态:不确定;半导体供应链媒体传闻(reportedly、未确认)历史上常见周一高开后回落,但本轮未取足真实先例样本,不作为交易依据
工具执行结果 · 成功 2 · 降级 0 · 失败 1 · 取消 0
- search_processed_events 成功 stock_tools HTTP · 14 ms
{"result": "search_processed_events:agent query=`nvidia nvhbm base die tsmc 3nm samsung sk hynix micron | nvidia 要求 hbm 厂商 base die 采用台积电 3nm | seoul economic daily nvhbm tsmc base die 2026`;结构化索引覆盖完整 72 小时;旧记录兼容扫描近 0.0/72 小时、0 条本臂决策(完整),返回 0 条候选。未命中只表示这些 agent query 表达式没有召回候选,不能据此证明消息首发或不是重复;按当前事件继 - web_search 成功 doubao_search · 1,684 ms
豆包搜索结果(原始查询:NVIDIA NVHBM TSMC 3nm base die Samsung SK hynix Micron Seoul Economic Daily;API SearchType:web) - kb_search 失败 stock_tools HTTP · 58 ms
kb_search 服务暂不可用;这不是一条知识库命中。
原文全文
展开原文 · 3,651 字
[News] NVIDIA Reportedly Pushes TSMC 3nm NVHBM Base Dies for Samsung, SK hynix, Micron in Unlikely Foundry Tie-Up
As previously reported by ZDNet in September, Samsung is pursuing a dual-track strategy for custom HBM, tapping both its own foundry and rival TSMC for base die production. A new report from Seoul Economic Daily lends further weight to this strategy, revealing that NVIDIA has asked Samsung, SK hynix and Micron to adopt TSMC’s 3nm process for the base dies of its NVHBM, unveiled in August.
The move brings two fierce foundry rivals, Samsung and TSMC, into closer cooperation despite their competition for major customers such as Qualcomm and Tesla. According to Seoul Economic Daily, NVIDIA’s push to standardize production across suppliers is aimed at ensuring consistent HBM performance while simplifying product validation. Samsung’s Device Solutions (DS) division, which oversees its foundry business, reportedly agreed to the requirements following an internal review.
Beyond manufacturing consistency, TSMC’s yield advantage appears to be another key factor. A separate Seoul Economic Daily report notes that NVHBM’s complex base die design requires advanced logic technology, with industry estimates placing TSMC’s 3nm yields above 90%, versus around 60% for Samsung Foundry’s 2nm (SF2) process.
NVHBM’s custom base die integrates the memory controller traditionally housed in the GPU, underscoring the need for advanced logic processes. According to NVIDIA, the technology offers up to 30% more memory bandwidth, 15% lower HBM power consumption and 25% more XPU compute die area than standard HBM4E.
The partnership is not entirely new, however. According to Seoul Economic Daily, Samsung and TSMC first collaborated four years ago to ensure HBM compatibility with TSMC’s GPU packaging process. Their latest tie-up, however, takes the relationship a step further, extending it into HBM manufacturing for the first time.
Samsung Keeps Its Own Foundry in Play for NVHBM Base Dies
Still, Samsung is keeping its own foundry in the picture. According to Seoul Economic Daily, with TSMC’s 3nm capacity facing competing demand from AI accelerators and smartphone chips, Samsung is validating NVHBM base die production on its 2nm process as a potential alternative should TSMC face capacity constraints.
Indeed, TSMC flagged tight 3nm capacity at its October 15 earnings call, with the node accounting for 33% of third-quarter wafer sales, its largest share among all process nodes. According to Economic Daily News, Chairman and CEO C.C. Wei announced plans for another 3nm fab in Tainan, on top of existing expansion projects in Arizona, Japan’s Kumamoto and Taiwan’s Southern Taiwan Science Park. The additional fab is slated to begin mass production in the first half of 2028.
Beyond NVHBM, Samsung remains committed to producing base dies in-house for its standard HBM lineup. According to Seoul Economic Daily, both its HBM4, which entered mass production earlier this year, and HBM4E, now undergoing production validation, use Samsung Foundry’s 4nm process for base dies, while their core dies are manufactured on 1c DRAM lines at its Hwaseong and Pyeongtaek campuses.
Samsung also plans to maintain its turnkey approach to base die production for custom HBM supplied to other customers, including AMD, while exploring its own 2nm process as an alternative for NVHBM, the report adds.
Read more
- [News] NVIDIA’s NVHBM Reshapes Base Die Strategies: How Micron, Samsung Are Bringing TSMC Into the Fold
- [News] NVIDIA’s Supply Commitments Soar to $279B as Memory Costs Surge; New NVHBM Boosts Bandwidth 30%
(Photo credit: NVIDIA)
As previously reported by ZDNet in September, Samsung is pursuing a dual-track strategy for custom HBM, tapping both its own foundry and rival TSMC for base die production. A new report from Seoul Economic Daily lends further weight to this strategy, revealing that NVIDIA has asked Samsung, SK hynix and Micron to adopt TSMC’s 3nm process for the base dies of its NVHBM, unveiled in August.
The move brings two fierce foundry rivals, Samsung and TSMC, into closer cooperation despite their competition for major customers such as Qualcomm and Tesla. According to Seoul Economic Daily, NVIDIA’s push to standardize production across suppliers is aimed at ensuring consistent HBM performance while simplifying product validation. Samsung’s Device Solutions (DS) division, which oversees its foundry business, reportedly agreed to the requirements following an internal review.
Beyond manufacturing consistency, TSMC’s yield advantage appears to be another key factor. A separate Seoul Economic Daily report notes that NVHBM’s complex base die design requires advanced logic technology, with industry estimates placing TSMC’s 3nm yields above 90%, versus around 60% for Samsung Foundry’s 2nm (SF2) process.
NVHBM’s custom base die integrates the memory controller traditionally housed in the GPU, underscoring the need for advanced logic processes. According to NVIDIA, the technology offers up to 30% more memory bandwidth, 15% lower HBM power consumption and 25% more XPU compute die area than standard HBM4E.
The partnership is not entirely new, however. According to Seoul Economic Daily, Samsung and TSMC first collaborated four years ago to ensure HBM compatibility with TSMC’s GPU packaging process. Their latest tie-up, however, takes the relationship a step further, extending it into HBM manufacturing for the first time.
Samsung Keeps Its Own Foundry in Play for NVHBM Base Dies
Still, Samsung is keeping its own foundry in the picture. According to Seoul Economic Daily, with TSMC’s 3nm capacity facing competing demand from AI accelerators and smartphone chips, Samsung is validating NVHBM base die production on its 2nm process as a potential alternative should TSMC face capacity constraints.
Indeed, TSMC flagged tight 3nm capacity at its October 15 earnings call, with the node accounting for 33% of third-quarter wafer sales, its largest share among all process nodes. According to Economic Daily News, Chairman and CEO C.C. Wei announced plans for another 3nm fab in Tainan, on top of existing expansion projects in Arizona, Japan’s Kumamoto and Taiwan’s Southern Taiwan Science Park. The additional fab is slated to begin mass production in the first half of 2028.
Beyond NVHBM, Samsung remains committed to producing base dies in-house for its standard HBM lineup. According to Seoul Economic Daily, both its HBM4, which entered mass production earlier this year, and HBM4E, now undergoing production validation, use Samsung Foundry’s 4nm process for base dies, while their core dies are manufactured on 1c DRAM lines at its Hwaseong and Pyeongtaek campuses.
Samsung also plans to maintain its turnkey approach to base die production for custom HBM supplied to other customers, including AMD, while exploring its own 2nm process as an alternative for NVHBM, the report adds.
Read more
- [News] NVIDIA’s NVHBM Reshapes Base Die Strategies: How Micron, Samsung Are Bringing TSMC Into the Fold
- [News] NVIDIA’s Supply Commitments Soar to $279B as Memory Costs Surge; New NVHBM Boosts Bandwidth 30%
(Photo credit: NVIDIA)
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